This disclosure relates to a semiconductor device, and properly used for, for example, a semiconductor device including a nonvolatile memory.
In nonvolatile memories such as an EEPROM (Electrically Erasable Programmable Read-Only Memory) and a flash memory, a current passing through a memory cell to be read is compared with a reference current, allowing reading of memory cell data (“1” or “0”) to be read.
Generally, a current passing through a memory cell (hereinafter referred to as “memory cell current”) fluctuates depending on the temperature, the power supply voltage, and the manufacturing process. Thus, to obtain a reading margin during reading of data, the reference current needs to depend on a temperature and a power supply voltage like the memory cell current.
The related arts will be discussed below. Japanese Unexamined Patent Publication No. 2000-11671 (Patent Literature 1) discloses a semiconductor memory where a reading voltage margin is obtained by an internal voltage having the same temperature dependence as a memory cell threshold voltage. Japanese Unexamined Patent Publication No. 2014-26680 (Patent Literature 2) discloses a current compensating circuit used for suppressing reading voltage variations caused by an IR drop of a control gate voltage.